1. Field of the Invention
This invention relates to data communications processors in general and specifically to multiprocessor arrays dedicated to the purpose of message concentration and multiplexing.
2. Prior Art
A wide variety of processor controlled data communications controllers and multiplexers exists in the known prior art. Examples are the International Business Machines Corporation Model 3704 and 3705 communications controllers or the more recent Model 3725 communications controller. These machines are computer processor based and utilize a scanner to interface communications between the communications adapters and the main memory operated by the processor. Direct memory access is featured in some models between the input-output ports and the main memory. However, this direct memory access is under control of the main processor in the controller and a scanner is utilized for servicing the input-output adapters. This design entails some inherent limitations in speed of access from the adapter ports to the main memory and, as speeds of communication increase on the serviced ports, the DMA processing load on the control processor becomes unwieldy.
Another example is illustrated in U.S. Pat. No. 4,093,823 which also incorporates a scanner and utilizes some form of direct memory access to transfer information from a buffer. The buffer is loaded by the scanner and the transfer to the main memory is under control of a main control processor. This design is similarly limited by incorporation of the scanner and the involvement of the control processor in the DMA operation to the point that as higher communication speeds and traffic loads occur, the system becomes unwieldy and incapable of servicing all of the I/O demands without appreciable delay.